Such transceiver systems can be subject to various phase constraints and can experience phase variations due to various tolerances and build variables. The phase shifters of particular interest may vary widely but include selectable or variable phase shifters used, e.g., in transceiver systems and the like. selectively applying a resistive loss, for equalizing insertion losses, etc. More particularly various inventive concepts and principles embodied in methods and apparatus, e.g. In some embodiments, the present disclosure concerns phase shifters, e.g., delay line phase shifters, and more specifically techniques and apparatus for selectable phase shift that are arranged and constructed for equalizing insertion loss over various phase shifts. 2 delay line phase shifter systems in accordance with one or more embodiments.DETAILED DESCRIPTION 8-9 show flow charts for methods for selecting a phase shift that may be used in conjunction with the FIG. 7 show simulation results from models for delay line phase shifters in accordance with one or more embodiments andįIG. 3 depicts a representative diagram of a system application of the delay line phase shifter of FIG. 2 in a representative form, shows a further phase shifter with selectable phase in accordance with one or more embodiments įIG. 1 depicts in a simplified and representative form, a high level diagram of a phase shifter with selectable phase shift in accordance with one or more embodiments įIG. The accompanying figures where like reference numerals refer to identical or functionally similar elements throughout the separate views and which together with the detailed description below are incorporated in and form part of the specification, serve to further illustrate various embodiments and to explain various principles and advantages all in accordance with the present invention.įIG. Even if an attenuator exists in the relevant system for other reasons, that attenuator will need to be more complicated with more steps if it serves multiple or additional purposes.BRIEF DESCRIPTION OF THE DRAWINGS This is undesirable and leads to complications such as a variable attenuator to offset such changes in insertion loss. One concern with variable or selectable phase shifters is typically a change in insertion loss occurs with a change in phase shift. For example, various transceiver systems need to control relative phase between two or more signals fairly closely and phase shifters are one way to facilitate this phase control. Various systems require a relatively closely controlled phase for signals provided by such systems. The signal can also go into the logic array for resynchronization if you are not using IOE read FIFO for resynchronization.įor Arria® V SoC devices, you can feed the hard processor system (HPS) DQS delay settings to the HPS DQS logic block only.This invention relates in general to a delay line phase shifter and more particularly methods and apparatus for selectable phase shifting where phase shift and insertion loss are largely unrelated. The shifted DQS/CQ/CQn/QK# signal goes to the DQS bus to clock the IOE input registers of the DQ pins. You can feed the DQS delay settings to the DQS logic block and logic array.
#Phase shifter vs simple delay software
The Intel® Quartus® Prime software automatically sets the DQ input delay chains, so that the skew between the DQ and DQS/CQ/CQn/QK# pins at the DQ IOE registers is negligible if a 0° shift is implemented. For example, with a 0° shift, the DQS/CQ/CQn/QK# signal bypasses both the DLL and DQS logic blocks. The 7-bit DQS delay settings from the DLL vary with PVT to implement the phase-shift delay. However, not all phase-shift combinations are supported. The shifted DQS signal is then used as the clock for the DQ IOE input registers.Īll DQS/CQ/CQn/QK# pins referenced to the same DLL, can have their input signal phase shifted by a different degree amount but all must be referenced at one particular frequency. The DLL can shift the incoming DQS signals by 0° or 90° by using two delay cells in the DQS logic block.
0 kommentar(er)
